FS the case (flip chip, the turned chip, without a metal cover)
AGP 3. 8x shinny'y the interface at NV40, PCI Express 16h at NV (second chip HSI is integrated into the case the bridge)
Special operating mode AGP 16h (in both parties), for PCI-Express bridge HSI
Piksel'ny'h processors, on one textural block on everyone with an any filtration of integer and floating structures (anisotropy of a degree up to 16h inclusive).
Topmost processors, on one textural block on everyone, without a filtration of chosen values (discrete sample)
Calculation, blending and record up to full (color, depth, the buffer of patterns) pixels for a step
Calculation and record up to values of depth and buffers of patterns for a step (if operations with color are not made)
Support special optimizaciy portrayals of geometry for acceleration of algorithms of shadows on the basis of the buffer of patterns (so-called technology Ultra Shadow II)
All necessary for support piksel'ny'h and topmost sheyderov versions 3.0, including dynamic branchings in piksel'ny'h and topmost processors, sample of values of structures of topmost processors, etc.
The buffer of notebook computer reviews hp the staff in a floating format (including operations blendinga) is supported
Programmed potokovy'y the videoprocessor (for problems of a compression, dekompressii and postprocessings of video)
Consumes up to 1 Watt of energy (on a card two sockets of an additional feed, power supplies by total capacity of 4 and more Watt are recommended)
Actually processor on the scheme is designated by a yellow rectangular, other blocks surrounding it are shown for fuller picture. It is declared, that NV contains independent processors (we shall mentally copy the yellow block of times), each of which executes the commands and has own control logic (that is different processors can simultaneously execute various branches of conditions above different tops). For one step topmost processor NV can execute one vector operation (up to four component FP32) one scalar FP operation and to provide one access to a structure. Integer and floating formats of structures and mip-mapping are supported. In one topmost sheydere can be involved up to four various structures. However the filtration is not made – the idle time, discrete access to the nearest value on the set coordinates notebook computer reviews hp is possible only.
So the summary tablet of parameters of topmost processor NV from the point of view of topmost sheyderov DX in comparison looks
Let's stop on the most interesting facts. First, if earlier in NV3X there was only one processor kvadov, the block processing for a step from four pixels (2h2) now such processors became four.
They are completely independent also each of them can be excluded from work (for example, for creation
The facilitated version of the chip with three processors at presence of marriage in one of them). Still
In each processor. Accordingly, it was kept also similar with NV3X the approach on execution piksel'ny'h sheyderov:
Run through one adjustment (operation) more than hundreds kvadov and the subsequent change of adjustment in conformity
With a code sheydera. But there are also appreciable differences. First of all is number TMU – now at us only on
To one TMU on each pixel kvada. In total at us processors kvadov, in everyone on TMU, thus, all them 16.
New TMU support an anisotropic filtration with a parity of the parties up to 16: inclusive (so-called 16h, at NV3X was up to notebook computer reviews hp 8h) and, nakonec-to, have learned to carry out all kinds of a filtration with floating formats of structures. However, under condition of bit accuracy a component (FP16). For FP the filtration is still inaccessible, however and FP it is possible to consider as considerable progress – now floating structures become "full" alternative integer in any applications as filtration FP of structures occurs without decrease in speed (however, the raised dataflow can and should affect productivity of real appendices).
Let's note the two-level organization ke`shirovaniya structures – each processor kvada has an own cache of structures of the first level. Necessity of presence of this is caused by two facts – quadruple increase in number processable simultaneously kvadov (the turn kvadov in one processor has not grown, but processors now four) and presence of competitive notebook computer reviews hp access to a cache of structures from topmost processors.
On each pixel it is necessary on two ALU, and each of them can execute two various (!) operations above different number any way chosen a component of a vector (up to 4h). That is, schemes 4, 1+1, 2+1, 3+ (as in R3XX), and the new configuration 2+ earlier inaccessible are possible. More in detail about this question see DX Current. Any masking and rearrangement a component after operation is supported. Besides ALU is capable to carry out normalization of a vector as one operation that can essentially affect productivity of some algorithms. Hardware calculation of values SIN and COS has been withdrawn from new architecture NVIDIA – experience has shown, that the transistors spent for this opportunity have been spent in vain – all the same access under the elementary table (1D to a structure) is capable to yield the best results from the point of view of speed, especially, considering absence of such support at ATI.
Thus, depending on a code, can be executed from notebook computer reviews hp one up to four various FP operations for a step, above vectors and scalars. On the scheme it is visible, that the first ALU will be involved for service operations during sample of values of structures, thus, for one step we can or choose one value of a structure and involve the second ALU for one or two operations, or involve both ALU if we do not choose a structure in this call. Productivity of such sheaf directly depends on the compiler and a code, but it is obvious, that we have
According to some information, the number of time registers for everyone kvada has been increased twice, that is now we have time FP the register on pixel or time FP registers. This fact should increase essentially productivity complex sheyderov. Besides any hardware restrictions on length piksel'ny'h sheyderov are removed and the number vy'borok structures – now all notebook computer reviews hp will depend only from API. The Most important improvement – support of dynamic management by execution.
And now we shall return to our scheme and we shall pay attention to its bottom part. There the block which is responsible for comparison and updating of values of color, a transparency, depth and the buffer of patterns is located. In total at us such blocks. In view of sufficient uniformity of a problem of comparison and updating, we can use this block in two modes:
Comparison and updating of value components of a transparency and color (blending)
Certainly, that last mode is possible only in case of absence of the calculated and written down value of color. Here whence in the specification it is specified, that in case of absence of color the chip can paint over (more precisely to fill) pixels for one step, and pay off both value of depth, and value of the buffer of patterns. Similar "turbo" a mode is useful first of all to acceleration of construction of shadows on the basis of the buffer of patterns (the algorithm accepted in Doom III), notebook computer reviews hp and for preliminary pass of rendering in which pays off only Z the buffer (frequently such technics allows to save time on long sheyderah as the factor of overlapping garantirovanno will be reduced up to unit).
Nakonec-to annoying omission with absence in family NV3X of support MRT (Multiple Render Targets – rendering in some buffers) – that is opportunities of calculation and record in one piksel'nom sheydere up to four various values of color which will be is corrected then are placed in different buffers (the identical size). Absence of such function at NV3X was serious argument in favour of R3XX for developers. Now, in NV40, this opportunity has appeared. One more important difference from the previous generations – intensive support by this block of floating arithmetics. All operations in comparison, blendingu and records of color we can pass in a format component FP16. Nakonec-to have, that refers to, full (orthogonal) support of operations with bit a floating point – both by way notebook computer reviews hp of a filtration and sample of structures, and by way of work with the buffer of the staff. On turn FP32, but, probably, it is a question of following generation.
One more interesting fact – support MSAA. As well as its predecessors (NV 2H and NV X), NV can carry out x MSAA without loss of speed (it is generated and compared two values of depth on one pixel) and in case of x MSAA it is necessary to add one penal step (however, in practice is not present necessity to calculate four values for a step – will be all the same problematic to write down all in the buffer of depth and the staff so much information for one step – the passband of memory is limited enough). More 4h MSAA it is not supported – as well as in notebook computer reviews hp the previous family, more and more complex modes hybrids between 4h MSAA and the subsequent SSAA this or that size. But now, nakonec-to, it is supported RGMS (the turned lattice of readout MSAA):
Here such separate programmed block NV incurs problems of processing of videostreams:
The processor contains four functional blocks (integer ALU, vector integer ALU with components, the block of loading and a unloading of data and the block of management of transitions and conditions) and can carry out thus up to four various operations for a step. A format of data – integers, probably, bit or bit accuracy (it is precisely not known, but for some algorithms of bats would be insufficiently). For convenience the processor includes special opportunities of sample, switching and record of dataflows. Classical problems of decoding and coding of video (IDCT, deinterleysing, transformation of color models, etc.) can be executed without participation CPU. However management from the central processor all the same is required – preparation of data and a choice of parameters of transformations should be carried out on notebook computer reviews hp CPU, especially in case of enough complex algorithms of compression including unpacking as one intermediate steps.
Such processor is capable to unload essentially CPU, especially in case of greater sanctions of video, such, as formats HDTV more and more typing popularity. It is not known, whether opportunities of this processor for acceleration 2D schedules are used, especially the some people enough complex functions GDI + — would be logical to involve it in this field, but the exact information on this aspect at us is not present. Anyway, NV corresponds to the highest requirements to hardware acceleration 2D – all necessary vy'chislitel'no intensive functions GDI and GDI + are carried out it is hardware.
Opportunity of translation of the interface in AGP 8h by means of bilateral
Piksel'ny'h processors, on one textural block on everyone
Topmost processors, on one textural block on everyone,
Calculation, notebook computer reviews hp blending and record up to full (color, depth, the buffer
Calculation and record up to values of depth and buffers of patterns for
Support special optimizaciy portrayals of geometry for acceleration of algorithms of shadows on the basis of the buffer of patterns (so-called technology Ultra Shadow II) in particular widely used in cursor Doom III
All necessary for support piksel'ny'h and topmost sheyderov versions
3.0, including dynamic branchings in piksel'ny'h and topmost processors,
MRT (Multiple Render Targets — rendering in some buffers)
Programmed potokovy'y the videoprocessor (for problems of a compression, dekompressii and postprocessings of video)
Consumes up to Watt of energy (that is on PCI-Express the socket for an additional feed is not necessary to a card, the suggested source of a feed by total capacity of 3 or more Watt)
Special architectural differences from NV are not present, that, however, it is not surprising – NV is scaled (by reduction of number topmost and piksel'ny'h processors and channels of the controller of memory) the decision based on architecture NV40. Differences quantitative (on the scheme are notebook computer reviews hp allocated fat), instead of qualitative – from the point of view of architecture the chip practically has not changed.
So, available three (was six) topmost processors, and two (was four) independent piksel'ny'h the processor, each of which works with one kvadom (a fragment 2h pixel). It is interesting, that this time support shinnogo interface PCI-Express became "native" (that is realized in the chip), and AGP 8h payments will contain additional bilateral bridge PCI-Ex - AGP (it is shown by a dotted line), in detail described by us earlier. Besides we shall note very important limiting moment – the two-channel controller and 1 bit trunk of memory – this fact is in detail considered in the review.
The architecture topmost and piksel'ny'h processors has remained former – these elements have been in details described above in section NV40/NV45. Topmost and piksel'ny'e processors in NV have remained constant, and here internal caches could be reduced to proportionally number of conveyors. However, the number of transistors notebook computer reviews hp does not give special occasions for anxiety — considering not so greater sizes of caches, it would be more reasonable to leave their same, as at NV40, having compensated to that appreciable lack of a carrying strip of memory. Large enough on the size and transistors file ALU which is carrying out postprocessing, check, generation Z and blending pixels for record of results in the buffer of the staff also has been reduced on each conveyor in comparison with NV — all the same reduced strip of memory will not allow to write down full gigapikselya in second, and potential of a shading ( conveyors on 5 MHz) can be high-grade is used only on more or less complex sheyderah, with more than two structures and accompanying mathematical calculations.
The expanded opportunities of use of the system memory addressed through PCI Express for storage of buffers of the staff, structures and other information traditionally had in local memory
Piksel'ny'h the processor, on one textural block on everyone with an any filtration of integer and floating structures (anisotropy notebook computer reviews hp of a degree up to 16h inclusive).
Topmost processors, on one textural block on everyone, without a filtration of chosen values (discrete sample)
Calculation, blending and record up to full (color, depth, the buffer of patterns) pixels for a step
Calculation and record up to values of depth and buffers of patterns for a step (if operations with color are not made)
Support special optimizaciy portrayals of geometry for acceleration of algorithms of shadows on the basis of the buffer of patterns (so-called technology Ultra Shadow II) in particular widely used in cursor Doom III
All necessary for support piksel'ny'h and topmost sheyderov versions 3.0, including dynamic branchings in piksel'ny'h and topmost processors, sample of values of structures of topmost processors, etc.
The buffer of the staff in a floating format is supported and operation FP blendinga, unlike other chips of family is not supported
Programmed potokovy'y the videoprocessor (for problems of a compression, dekompressii and postprocessings of video)
Throughput of memory 2. gigabayta in sek./5. gigabayta in sek.
Any global architectural differences from NV and NV are absent, there are some innovations
In piksel'nom the conveyor, aimed for more effective work with system memory as the buffer of the staff. In general NV is scaled (by reduction of notebook computer reviews hp number topmost and piksel'ny'h processors and channels of the controller of memory) the decision based on architecture NV40. Differences quantitative (on the scheme are allocated fat), instead of qualitative from the point of view of architecture the chip practically has not changed, short of unique exception absence FP blendinga.
Available three topmost processors, as at NV43, and one (was two) independent piksel'ny'y the processor working with one kvadom (a fragment 2h pixel). PCI-Express became "native", realized on the chip, as well as in case of NV43, AGP 8h payments with this chip, in variant TC (TurboCache), are not made, as the idea of an effective utilization of system memory for rendering demands adequate throughput of the graphic trunk in both parties.
Very important limiting moment is the two-channel controller with 64-bitnoy the trunk of memory, its restrictions are in detail considered in reviews. And, by the case of the chip and number of conclusions, bats it is a hardware limit for NV and 1 bit cards on its basis cannot be, in family 62 they are realized on NV43.
The architecture topmost and piksel'ny'h notebook computer reviews hp processors, and also the videoprocessor has remained former these elements have been in details described
Us above. Short of declared completions for effective addressing system memory from blocks teksturirovaniya and
blendinga. However it that is sounded really is the reasons to consider, that all these opportunities, not such
Basic, and sold more likely at a level of the manager of the general cache and krossbara, have initially been incorporated in family
NV4X. Simply there is no sense to use them at a level of drivers at the senior cards with more high-speed and capacious local memory. Also there is no sense in such technology at cards with AGP the interface which becomes a bottleneck as low speed of record in system memory will affect, sravnimaya with speed PCI.
The difference connected with submission of data for structures and additional by for data recording of the staff (blendinga) in is notebook computer reviews hp obvious
System memory. However the initial scheme of the chip with krossbarom, treating the graphic trunk practically as the fifth channel
The controller of memory, it can be initially capable on such (since NV and even earlier). And it is complex to tell, really
Whether in NV there are architectural changes by way of work with record and data reading or these opportunities will simply be involved
On the other hand, we shall not deny, that optimum would be certain page MMU and dynamic pumping of data from system memory in local which would be treated as a cache of the third level. If such scheme is realized — all becomes on the places. And efficiency it will be appreciable above discrete accommodation of objects there or there, and presence of small hardware alterations is justified. As, notebook computer reviews hp obkatav this page block of pumping, it will be possible to involve it in the future architecture which, apparently, will be without fail supplied by such blocks.
Other discussions in conference:
